The present invention relates to memory circuits, and more specifically to multibit-output memory circuits having a plurality of output circuits.
The demand for multibit-output memory circuits has been increasing. A multibit-output memory includes a plurality of data output circuits connected to a plurality of data output terminals. Plural output data can thereby by supplied, increasing the amount of information that can be provided per access of the memory.
The memory cells included in a memory are divided into a plurality of groups, each associated with one of the data output circuits, and hence the number of memory cells associated with each data output circuit is remarkably reduced. Accordingly, the capacitance load on each output circuit can be made small so that each output circuit can operate at a high speed.
As described above, the multibit-output memories have been advantageously utilized in many information processing systems. However, the increased number of output circuits causes an increase in the peak current. The output circuits operate in parallel and the total amount of switching current is large. Such peak switching currents produce noise which causes a voltage drop within the memory itself and adversely affects the operation of the memory. The peak value of the switching current could be reduced by decreasing the driving ability of each output circuit. However, this method would require a large amount of switching time for driving loads by the reduced ability of output circuits, resulting in a low speed operation. Thus, reducing the driving ability of the output circuits is not a practical solution.